Entity

Time filter

Source Type


Chen Z.,Southwest Jiaotong University | Xu J.,Southwest Jiaotong University | Wu J.,Southwest Jiaotong University | He M.,Beijing Chunshu Rectifier Co.
Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering | Year: 2014

High voltage gain non-isolated DC-DC converters with low input current ripple have attracted much attention for photovoltaic cells, fuel cells and other renewable energy system applications. A zero input current ripple high voltage gain non-isolated converter was proposed, which combines a zero input current ripple boost converter and a coupled-inductor cell to achieve high voltage step-up. In addition, diode reverse recovery losses of the proposed converter was alleviated due to the leakage inductance of the transformer, but it cause serious voltage spike stress of the switch. Therefore, the passive lossless clamp circuit was adopted to recycle the leakage energy and thus a low-voltage-rated MOSFET with low Rds_on for reduction of the conduction loss and cost can be chosen. In addition, the proposed converter can nearly achieve zero input current ripple, and remove the electromagnetic interference (EMI) filter without sacrificing the performance of the converter. Consequently, small passive components, light weight and low costs can be achieved. Steady state analysis of the converter and operating characteristics was developed. Finally, experimental results from a 100 W 40 V/200 V prototype were presented to verify the analysis of the proposed converter. © 2014 Chin. Soc. for Elec. Eng.. Source


Zhang X.,Southwest Jiaotong University | Xu J.,Southwest Jiaotong University | Bao B.,Changzhou University | He M.,Beijing Chunshu Rectifier Co.
Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering | Year: 2014

The fixed off-time (FOT) controlled buck converter often operates in an unstable and chaotic state when the output capacitor has a low equivalent series resistance (ESR). By sensing inductor current information of main circuits for compensating the slope of output capacitor voltage, a ramp compensation technique of FOT controlled buck converter is proposed, which realizes that the converter is in stable and normal operation when a low ESR output capacitor is used. The action mechanism of the ramp compensation technique is analyzed, and the critical slope of compensation ramp voltage to ensure the converter stable operation is achieved quantitatively. The discrete-time map model of FOT controlled buck converter with ramp compensation is established, upon which the dynamical behaviors of the converter are investigated by taking the slope of compensation ramp voltage as the bifurcation parameter. The results indicate that the ramp compensation effectively extends the stable operating range of the output capacitor ESR of the converter, and the ramp compensation technique makes that FOT controlled buck converter with the low ESR output capacitor can also be in stable and normal operation. The experimental results verify the validity of the theoretical analysis. ©2014 Chin. Soc. for Elec. Eng. Source


Yang X.,Beijing Jiaotong University | Li Y.,Beijing Jiaotong University | Zheng T.Q.,Beijing Jiaotong University | He M.,Beijing Jiaotong University | He M.,Beijing Chunshu Rectifier Co.
Beijing Jiaotong Daxue Xuebao/Journal of Beijing Jiaotong University | Year: 2015

The main control system usually takes a structure based on DSP and FPGA because of its characteristic of onerous communication tasks, complex control algorithm and redundancy. In order to research the influence that the PWM pulses generated by DSP or FPGA are used for modular multilevel converter (MMC), the basic structural characteristics and a simple mathematical model are analyzed. Two laws and realizations of PWM are proposed and analyzed based on the characteristics of CPS-SPWM (Carirer Phase Shifted Sinusoidal PWM) in MMC. Moreover, the two types of PWM pulse are compared by means of simulation and experiment. The simulation results show that the PWM pulse based on the two schemes is the same. Meanwhile, the experimental results suggest that the actual PWM pulse distribution rule in the hardware is consistent. However, the different pulse widths lead to different control effects. The experimental results provide references for engineering design. © 2015, Journal Northern Jiaotong University. All right reserved. Source


An T.,Xian University of Technology | Li Y.,Xian University of Technology | Yin Q.,Beijing Chunshu Rectifier Co.
Lecture Notes in Electrical Engineering | Year: 2011

The paper introduces the η=WI/Xm=0.25 mathematical models and adopts mathematical model VB= 94ρn 0.7 to design structure parameters of high power double-base P+PINN+ structured fast soft recovery diodes. Platinum doping and electron irradiating technologies are used to mutually control the base minority carrier lifetime and distrbution, the design method is used to optimize the structure parameter of ZKR300A/ 2500V. The design parameters were tested and verified through experiments, which proved the parameters of diodes meet the designed target and achieved the level of similar products in abroad countries. The results prove that the design method and the selected parameters are correct,lifetime control is effective. © 2011 Springer-Verlag Berlin Heidelberg. Source


Li J.Z.,Beijing Jiaotong University | Zheng T.Q.,Beijing Jiaotong University | He M.Z.,Beijing Jiaotong University | He M.Z.,Beijing Chunshu Rectifier Co.
INTELEC, International Telecommunications Energy Conference (Proceedings) | Year: 2012

The principle of full-bridge DC-DC converter is briefly expounded, including the two typical control methods, named limited dual polarity hard-switch control and phase-shifted soft-switch control. Then the common mode noise equivalent circuits of full-bridge DC-DC converter are deduced, taking the common mode noise of the bridge leg's midpoint into account, and the difference between the two typical control strategies is illustrated through theoretical analysis. In the end, simulations are performed to validate the circuit models and theoretical analysis. © 2012 IEEE. Source

Discover hidden collaborations