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Munich, Germany

Avago Technologies is a designer, developer and supplier of analog, digital, mixed signal and optoelectronics components and subsystems. Hock Tan is the company's president and CEO. Avago Technologies is jointly headquartered in San Jose, California and Singapore. Wikipedia.


Patent
Avago Technologies | Date: 2015-10-21

Methods and systems are provided for Reducing Write I/O Latency Using Asynchronous Fibre Channel Exchange. A FCP target device may send one or more FC write control information units (IUs) to a FCP initiator device within a first FC exchange to request a transfer of data associated with a FCP write command IU previously sent to the FCP target device by the FCP initiator device within a second FC exchange. The FC write control IUs may be sent without the FCP target device first receiving from the FCP initiator device a sequence initiative of the second FC exchange, and/or may be sent within the first FC exchange concurrently with the FCP initiator device sending one or more FCP data IU sequences within the second FC exchange to the FCP target device. Thus, a full-duplex communication environment may be setup between the FCP initiator device and FCP target device.


Patent
Avago Technologies | Date: 2015-03-31

A test pattern is encoded using a run length limited line encoding to produce an encoded block of data. The encoded block of data is sent via a channel. A plurality of bits in the received block of data that are subsequent to a maximum length run in the sent data is compared to an expected plurality of bits. A type of bit error is classified based on a mismatch between the expected plurality of bits and the plurality of bits in the received block of data.


In one embodiment, an image processor is configured to obtain phase images, and to group the phase images into pseudoframes with each of at least a subset of the pseudoframes comprising multiple ones of the phase images and having as a first phase image thereof one of the phase images that is not a first phase image of an associated depth frame. A velocity field is estimated by comparing corresponding phase images in respective ones of the pseudoframes. Phase images of one or more pseudoframes are modified based at least in part on the estimated velocity field, and one or more depth images are generated based at least in part on the modified phase images. By way of example, different groupings of the phase images into pseudoframes may be used for each obtained phase image, allowing depth images to be generated at much higher rates than would otherwise be possible.


Patent
Avago Technologies | Date: 2015-06-17

A control device provides a supply voltage to an output transistor of a power amplifier. The control device includes a detector encoder, a switch sequencer and a power switch. The detector encoder receives a detection signal indicating a negative peak voltage level of an output signal of the power amplifier, receives a reference signal indicating a critical voltage of the detection signal at which the negative peak voltage level of the output transistor is deemed to be out of voltage with reference to saturation voltage of the output transistor, compares the detection and reference signals, and outputs Boost Request and Recovery Request signals in response. The switch sequencer translates the Boost Request and Recovery Request signals into multiple control bits. The power switch coordinates switching among a no boost voltage and multiple boost voltages based on the control bits, and outputs one of these voltages as the supply voltage.


An image processing system comprises an image processor having image processing circuitry and an associated memory. The image processor is configured to implement a face recognition system utilizing the image processing circuitry and the memory, the face recognition system comprising a face recognition module. The face recognition module is configured to identify a region of interest in each of two or more images, to extract a three-dimensional representation of a head from each of the identified regions of interest, to transform the three-dimensional representations of the head into respective two-dimensional grids, to apply temporal smoothing to the two-dimensional grids to obtain a smoothed two-dimensional grid, and to recognize a face based on a comparison of the smoothed two-dimensional grid and one or more face patterns.

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