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Taoyuan County, Taiwan

Chiu C.-F.,Nanya Technology Corporation | Huang C.-Y.,Nanya Technology Corporation | Shieh J.,Technology Development Center | Chiou T.-B.,Technology Development Center | And 3 more authors.
Proceedings of SPIE - The International Society for Optical Engineering

As the feature sizes continue to shrink, more overlay metrology data are needed to meet tighter overlay specifications which ensure high device yield. This study investigates the advantages of process corrections to overlay errors using various reduced measurement wafer schemes, and the improvement in yield that is realized using optimized overlay correction models. The capacitor layer of a 4x node DRAM product is chosen for verifying the sampling schemes in the experiment, because overlay errors of this layer are sensitive to device yield. The test wafers are split into five groups; four groups are sampled using various schemes and overlay correction models, and one group has a programmed overlay error. The post-correction overlay residuals in full wafer, baseline sampling and optimized sampling agree closely with predictions that are based on raw measurements. A scheme with iHOPC (intrafield high order process correction) partial third-order terms with a CPE (correction per exposure) function provides the best overlay performance. The averaged device yields of reduced sampling schemes are comparable with those of the full wafer scheme, however the reduction of the number of measurements that is made in optimized sampling reduce the metrology tool time by 26% from that required using the current scheme of factory. Therefore, the cost of metrology can be further reduced by applying the proposed optimized sampling map in the routine operations of fab. © 2012 SPIE. Source

Tseng S.-E.,ASML Taiwan Ltd | Chen A.,ASML Taiwan Ltd
Japanese Journal of Applied Physics

Extreme ultraviolet (EUV) lithography is considered the most promising single exposure technology at the 27nm half-pitch node and beyond. The imaging performance of ASML TWINSCAN NXE:3100 has been demonstrated to be able to resolve 26nm Flash gate layer and 16nm static random access memory (SRAM) metal layer with a 0.25 numerical aperture (NA) and conventional illumination. Targeting for high volume manufacturing, ASML TWINSCAN NXE:3300B, featuring a 0.33NA lens with off-axis illumination, will generate a higher contrast aerial image due to improved diffraction order collection efficiency and is expected to reduce target dose via mask biasing. This work performed a simulation to determine how EUV high NA imaging benefits the mask rule check trade-offs required to achieve viable lithography solutions in two device application scenarios: a 14 nm node 6T-SRAM contact layer and a 16 nm half-pitch NAND Flash staggered contact layer. In each application, the three-dimensional mask effects versus Kirchhoff mask were also investigated. © 2012 The Japan Society of Applied Physics. Source

Tseng S.-E.,ASML Taiwan Ltd | Chen A.,ASML Taiwan Ltd
Proceedings of SPIE - The International Society for Optical Engineering

EUV is considered as the most promising candidate for manufacturing advanced semiconductors at the 32nm HP technology generation and beyond. It has been demonstrated that the ASML TWINSCAN NXE:3100 is able to print 27nm lines and spaces and 32nm contact holes with NA0.25. Moving forward, higher NA EUV system such as the ASML TWINSCAN NXE:3300B can generate a higher contrast aerial image due to improved diffractive order collection efficiency and is expected to achieve a greater percentage of under-exposure or dose reduction via mask biasing. In this work, we study by simulation the benefit of EUV high NA imaging in the MRC (Mask Rule Check) trade-offs required to achieve the viable manufacturing solutions for two device application scenarios: 6T-SRAM contact layer for the logic 14 nm technology node, and 32nm half pitch NAND Flash contact layer. The 3D mask effects versus Kirchhoff mask for these two applications are also investigated. © 2011 SPIE. Source

Ng P.C.W.,National Taiwan University | Tsai K.-Y.,National Taiwan University | Lee Y.-M.,National Taiwan University | Wang F.-M.,National Taiwan University | And 2 more authors.
Journal of Micro/Nanolithography, MEMS, and MOEMS

Extreme ultraviolet (EUV) lithography is a promising candidate for high-volume manufacturing at the 22-nm half-pitch node and beyond. EUV projection lithography systems need to rely on reflective optical elements and masks with oblique illumination for image formation. It leads to undesired effects such as pattern shift and horizontal-to-vertical critical dimension bias, which are generally reported as shadowing. Rule-based approaches proposed to compensate for shadowing include changing mask topography, introducing mask defocus, and biasing patterns differently at different slit positions. However, the electromagnetic interaction between the incident light and the mask topography with complicated geometric patterns, such as optical diffraction, not only causes shadowing but also induces proximity effects. This phenomenon cannot be easily taken into account by rule-based corrections and thus imposes a challenge on a partially model-based correction flow, the so-called combination of rule- and model-based corrections. A fully model-based correction flow, which integrates an in-house optical proximity correction algorithm with rigorous three-dimensional mask simulation, is proposed to simultaneously compensate for shadowing and proximity effects. Simulation results for practical circuit layouts indicate that the fully model-based correction flow significantly outperforms the partially model-based one in terms of correction accuracy, while the total run time is slightly increased. © 2011 Society of Photo-Optical Instrumentation Engineers (SPIE). Source

Jungblut R.,ASML Taiwan Ltd | Chen A.,ASML Taiwan Ltd | Lee E.,ASML Taiwan Ltd | Wang L.,ASML Taiwan Ltd | And 5 more authors.
Proceedings of SPIE - The International Society for Optical Engineering

For the 28 nm node lithographic production steps, the process window for both overlay and CD are becoming increasingly tight. The overlay stability of lithography tools must be at a level of 1-2 nm within the product cycle time, while focus needs to be stable within 5 nm. Well-matched tools are crucial to improve the flexibility of tool usage and the pressure for higher tool availability is allowing less time for periodic maintenance and tool recovery. Here, we describe the way of working and results obtained with a long-term stability control application, containing a scanner performance control system with a correction feedback loop deploying scatterometry. In this study the overlay performance for immersion scanners was stabilized and the point-to-point difference to a reference is maintained at less than 4 nm. The capability of tool recovery handling after interventions is demonstrated. Results of overlay matching between machines are shown. The tool stability for focus was controlled in a range of less than 5 nm while improving the total focus uniformity. © 2011 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE). Source

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