Chiu T.-C.,National Cheng Kung University |
Huang H.-W.,National Cheng Kung University |
Lai Y.-S.,ASE Group
Microelectronics Reliability | Year: 2011
Two of the main driving forces for warpage deformation and residual stress in electronic packages are the thermal expansion mismatch between dissimilar package constituents and the crosslinking reaction of polymers during packaging thermal processes. For the purpose of quantitatively characterizing these two driving forces and assessing the process effect on warpage deformation, experimental and numerical analyses were applied to study the warpage evolution of overmolded ball grid array (BGA) package under post-mold curing (PMC) thermal histories. From in situ shadow Moiré warpage analyses on bimaterial and package specimens, it was observed that, during the isothermal curing condition, a significant increase in specimen warpage occurred as a result of molding compound shrinkage. A numerical modeling procedure that incorporates the models for the thermochemical cure kinetics, the curing- and chemical aging-induced shrinkage strains, and the cure-dependent viscoelastic relaxation modulus for the molding compound was then applied to simulate and compare to the experimentally obtained warpage evolutions. It can be seen from the analysis results that the evolution of package warpage over multiple thermal histories can be superpositioned by the thermal expansion mismatch-driven warpage change during non-isothermal stages and the chemical shrinkage-induced warpage evolution during isothermal aging at temperatures above the material glass transition point. © 2011 Elsevier Ltd. All rights reserved.
Appelt B.K.,ASE Group
2012 4th Electronic System-Integration Technology Conference, ESTC 2012 | Year: 2012
The relentless drive for miniaturization by mobile, electronic applications demands that the components follow suit. JEDEC describes the form factor for total component height including solder balls as XBGA when the height has been reduced to 0.5 mm. Several packaging solutions achieving this form factor will be introduced. In particular, a single sided substrate and concomitant package has been introduced which meets this form factor. Further, the manufacturing process has lead to the development of an entire product family of coreless substrates as well as embedded die/passives substrates. Process flows and reliability data will be discussed here in detail. Application samples will be shown.
Liang C.-L.,National Cheng Kung University |
Lin K.-L.,National Cheng Kung University |
Peng J.-W.,ASE Group
Journal of Electronic Materials | Year: 2015
This study investigated the microstructure, especially intermetallic compounds (IMCs), formed between a Cu pillar and Cu trace joined by thermal compression bonding with nonconductive paste (NCP). Continuous, uniform layers of Cu3Sn formed on the surface of both the Cu pillar and Cu trace. However, the growth of Cu6Sn5 was suppressed, forming nonuniformly on the Cu trace due to NCP filler entrapment at the Cu–solder interface that hindered Sn diffusion flux. Multireflow induced rapid growth of IMCs within the Cu pillar solder joint. The combination of multireflow and thermal cycle testing gave rise to asymmetric growth of IMCs between the chip side and substrate side as a result of stress migration induced by thermal cycling. © 2015 The Minerals, Metals & Materials Society
Lee Y.-H.,National Chiayi University |
Hu P.J.-H.,University of Utah |
Tu C.-Y.,ASE Group
ACM Transactions on Management Information Systems | Year: 2015
Document clustering is crucial to automated document management, especially for the fast-growing volume of textual documents available digitally. Traditional lexicon-based approaches depend on document content analysis and measure overlap of the feature vectors representing different documents, which cannot effectively address word mismatch or ambiguity problems. Alternative query expansion and local context discovery approaches are developed but suffer from limited efficiency and effectiveness, because the large number of expanded terms create noise and increase the dimensionality and complexity of the overall feature space. Several techniques extend lexicon-based analysis by incorporating latent semantic indexing but produce less comprehensible clustering results and questionable performance. We instead propose a conceptbased document representation and clustering (CDRC) technique and empirically examine its effectiveness using 433 articles concerning information systems and technology, randomly selected from a popular digital library. Our evaluation includes two widely used benchmark techniques and shows that CDRC outperforms them. Overall, our results reveal that clustering documents at an ontology-based, concept-based level is more effective than techniques using lexicon-based document features and can generate more comprehensible clustering results. © 2015 ACM.
Appelt B.K.,ASE Group
Advancing Microelectronics | Year: 2011
3D packaging is coming of age. Initially it was conceived to provide more memory in the same space. Memory die were stacked after thinning the die and bonding them on top of each other using conventional, thin die bond adhesive. The interconnect method remained wire bonding. While at first same die were stacked, the functionality was soon expanded by stacking different types of memory and or controllers in the same package. The explosive growth in mobile products and new applications while shrinking the form factor demanded a new packaging concept: the stacking of packages. The bottom package contains typically the application processor while the top package holds memory, often stacked as well. Here, interconnects between packages are solder joints. As the demand for functionality and performance continues to grow relentlessly, bandwidth and electrical performance increase again demanding more advanced packaging. It appears that silicon interposers, also called 2.5 D, will be the next type of packaging. The silicon interposer acts as a very high density substrate interconnecting die of different functionality. The interposer still requires an organic substrate as a CTE mismatch mitigator to connect to the motherboard. The ultimate step of the packaging technology evolution will be the real 3D package based on die to die interconnects based through silicon vias (TSV) providing the densest levels of interconnects between heterogeneous die and components.