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Patent
ARM Inc | Date: 2015-07-31

Subject matter disclosed herein may relate to correlated electron switches.


News Article | December 16, 2016
Site: www.businesswire.com

CAMBRIDGE, England--(BUSINESS WIRE)--ARM has acquired Allinea Software, an industry leader in development and performance analysis tools that maximize the efficiency of software for high performance computing (HPC) systems. Currently, 80 percent of the world’s top 25 supercomputers use Allinea’s tools, with key customers including the US Department of Energy, NASA, a range of supercomputing national labs and universities, and private companies using HPC systems for their own scientific computation. “As systems and servers grow in complexity, developers in HPC are facing new challenges that require advanced tools designed to enable them to continue to innovate,” said Javier Orensanz, general manager, development solutions group, ARM. “Allinea’s ability to debug and analyze many-node systems is unique, and with this acquisition we are ensuring that this capability remains available to the whole ARM ecosystem, and to the other CPU architectures prevalent in HPC, as well as in future applications such as artificial intelligence, machine learning and advanced data analytics.” This acquisition further enhances ARM’s long-term growth strategy in HPC and builds on ARM’s recent success with Fujitsu’s 64-bit ARM®v8-A powered Post K supercomputer, and the launch of the ARMv8-A Scalable Vector Extension. It follows the announcement that ARMv8-A will be the first alternative architecture with OpenHPC support, and the release of ARM Performance Libraries, which provide ease of software development and portability to ARMv8-A server platforms. As this momentum continues, bringing Allinea’s expertise into ARM will continue to enable partners with access to a comprehensive software tools suite that address increasingly complex system challenges. “Writing and deploying software that exploits the ever increasing computing power of clusters and supercomputers is a demanding challenge - it needs to run fast, and run right, and that’s exactly what our suite of tools is designed to enable,” said David Lecomber, CEO, Allinea. “As part of ARM, we’ll continue to work with the HPC community, our customers and our partners to advance the development of our cross-platform technology, and take advantage of product synergies between ARM’s compilers, libraries and advisory tools and our existing and future debugging and analysis tools. Our combined expertise and understanding of the challenges this market faces will deliver new solutions to this growing ecosystem.” Allinea’s unique tools provide developers with the ability to deal with systems with hundreds, thousands (and hundreds of thousands) of cores. The product suite includes the developer tool suite Allinea Forge, which incorporates an application debugger called Allinea DDT and a performance analyzer called Allinea MAP, and an analysis tool for system owners, users and administrators called Allinea Performance Reports. Allinea will be integrated into the ARM business with all functions and Allinea’s Warwick and Eastleigh locations retained. Allinea’s former CEO David Lecomber will join the ARM development solutions group management team. ARM technology is at the heart of a computing and connectivity revolution that is transforming the way people live and businesses operate. From the unmissable to the invisible; our advanced, energy-efficient processor designs are enabling the intelligence in 90 billion silicon chips and securely powering products from the sensor to the smartphone to the supercomputer. With more than 1,000 technology partners including the world’s most famous business and consumer brands, we are driving ARM innovation into all areas compute is happening inside the chip, the network and the cloud. All information is provided "as is" and without warranty or representation. This document may be shared freely, attributed and unmodified. ARM is a trademark or registered trademark of ARM Limited (or its subsidiaries). All other brands or product names are the property of their respective holders. © 1995-2016 ARM Group.


Whatmough P.N.,ARM Inc | Das S.,ARM Inc | Bull D.M.,ARM Inc
Digest of Technical Papers - IEEE International Solid-State Circuits Conference | Year: 2013

The unrelenting demands of wireless/multimedia DSP workloads necessitate specialized hardware to achieve higher performance and power efficiency. Razor systems offer even greater power efficiency by minimizing static supply voltage (VDD) guardbands for process/voltage/temperature (PVT) variation, while also providing a degree of resilience to general delay faults (e.g. SEUs). To date, Razor has only been demonstrated on silicon in the context of microprocessor pipelines [1][2]. Reported Algorithmic Noise Tolerance (ANT) circuits [3][4] operate at very high error rates, but rely on imbalanced ripple-carry adders and hence clock frequency (Fclk) is limited (50-88MHz). ANT also requires additional datapaths for error detection/correction, which cannot be clock gated in the absence of errors, increasing baseline area and power. Combining Razor error detection with algorithm-level correction enables high-Fclk datapaths and low-overheads. A 0.19mm2 16-tap Razor FIR datapath is fabricated in 65nm LP CMOS, with input and output SRAMs, tunable pulse-clock generator, BIST logic and an AHB slave on-chip bus interface (Fig. 24.5.1), demonstrating: 1) two distinct fixed-latency Razor error-correction techniques for real-time DSP datapaths: time-borrow tracking (TBT) and interpolation-based approximate error correction (AEC); 2) a Razor latch (RZL) circuit with reduced pessimism; 3) a 1GHz datapath, an order of magnitude improvement over [3][4] due to elimination of ripple-carry adders; 4) energy efficiency improvement of up to 37%. © 2013 IEEE.


Patent
ARM Inc | Date: 2014-09-29

A graphics processing pipeline comprises a tessellation stage 10 operable to tessellate a patch representing some or all of an object to be rendered, so as to generate positions for a set of vertices for one or more output primitives, and a primitive assembly stage 20 operable to assemble one or more output primitives for processing using the positions for a set of vertices generated by the tessellation stage and pre-defined information defining the connectivity between at least some of the vertices of the set of vertices.


The present invention preferably relates to a self-activated postural compliance lift-assistance device that puts the wearer in an increasingly supported lifting posture, thereby providing a lift-assistance device that conforms with best ergonomic practices for lifting.


Patent
ARM Inc | Date: 2010-11-15

A collector device includes a collector connected to a positioner, such as a robot arm. The positioner can automatically move the collector in multiple dimensions to collect objects into the collector according to a specified collection pattern. By moving the collector in multiple dimensions, the positioner provides for objects to be arranged in the collector according to a specified pattern. The positioner can also move the collector so that the collected objects are transferred to a second collector for shipping, storage, and the like.


News Article | November 11, 2015
Site: www.eweek.com

Throughout keynote presentations and other conference sessions, the message was that security needs to be a priority when developing for the Internet of things. SANTA CLARA, Calif.—ARM is looking to extend the reach of its chip designs beyond smartphones and tablets and into new growth areas, with the Internet of things being a key one. The company sees the development of tens of billions of connected devices, systems and sensors as a natural fit for its low-power system-on-a-chip (SoC) designs, and has made a strong push into the burgeoning Internet of things (IOT) market over the last couple of years. That has included everything from the development of its mbed IoT platform to partnerships with the likes of IBM and acquisitions to build out its capabilities in the market. At the company's TechCon 2015 show here Nov. 10, CTO Mike Muller unveiled ARM's new Cortex-A35 SoC, which is aimed at low-cost smartphones but also can be used for IoT devices. With a broad array of devices becoming connected, the attack surface for hackers is rapidly increasing, and the issues of security and privacy have been at the forefront of IoT discussions throughout the industry. They also have been a focus at TechCon this week, where there were more than a dozen sessions about security and the IoT . In addition, at the same time he announced the Cortex-A35, Muller also introduced the company's efforts to bring its TrustZone technology that is pervasive in its architectures for mobile systems to IoT devices though the development of its new ARMv8-M architecture. Muller stressed the need for a layered approach to security that starts with the hardware and works its way up through software and communications.CEO Simon Segars followed that up in his Nov.11 keynote address, talking about security, privacy and the need to develop trust among end users and governments in the use of a myriad of connected devices in use. Otherwise, they risk stalling what he and ARM partners on the TechCon stage said is a significant opportunity for technology innovations, business advancements and improving the lives of the world's population.If people don't trust their connected devices, they won't want to use them, Segars said. If governments are concerned about security, they will move in with regulations. The key is for the tech industry to get ahead of the security and privacy issues that impact trust and develop solutions that will deal with the challenges, the CEO said. An important part of that will be to address security as the devices are developed, rather than trying to bolt on technologies later. "We have the opportunity to get this right," Segars said to several thousand TechCon attendees. "Let's take that opportunity to get the IoT right. “As the IoT evolves, and as it gets more complex, it will be difficult to address security after the fact, he added. The Internet of things is expected to grow quickly over the next few years, with Cisco Systems forecasting that the number of connected devices worldwide will jump from 25 billion in 2014 to more than 50 billion by 2020. IDC analysts expect that IoT spending will hit $1.7 trillion by that year. IDC also is predicting that as the number of devices grows, so will the number of cyber-attacks. According to IDC figures, the number of IoT devices will grow to 22 billion by 2018 and will fuel the development of 200,000 new apps and solutions to take advantage of them. However, security will continue to be a key issue. During a recent webcast, Frank Gens, senior vice president and chief analyst at IDC, reportedly said that by 2018, two-thirds of enterprises will experience IoT security breaches . "Trust is all about risk mitigation," said Coby Sella, vice president of products and technology at ARM said during a panel discussion. "You need to address that risk factor."


News Article | November 11, 2015
Site: www.businesswire.com

SANTA CLARA, California & UPPSALA, Sweden--(BUSINESS WIRE)--IAR Systems®, the world’s leading supplier of embedded development tools, is releasing a new version of its high-performance C/C++ compiler and debugger toolchain IAR Embedded Workbench® for ARM®. The new release adds extended trace capabilities with the enhanced Embedded Trace Macrocell™ (ETMv4) for ARM Cortex®-M7 as well as Program Trace Macrocell (PTM) for recent ARM Cortex-A cores. To cope with today’s increasingly complex software development and meet tight project deadlines, development teams need to find ways of improving their efficiency and ensuring the quality of their applications. With debugging constantly being a large part of embedded development, this is an important focus area for efficiency efforts. Trace lets developers observe the effect of the program as it executes on the device and use techniques such as full instruction trace and function profiling. This allows them to analyze and improve the application’s performance, as well as find bugs that can be hard or even impossible to identify any other way. The trace is non-intrusive and does not affect the program’s real-time behavior, and the information is available in real time in IAR Embedded Workbench. With ETM, developers are able to trace every single instruction executed in an application. ETM is already available in IAR Embedded Workbench for devices based on the ARM Cortex-M3 and ARM Cortex-M4 cores. With the new version, also developers working with devices based on the high-performance, low-power ARM Cortex-M7 core will be able to benefit from this technology. ETM is enabled in the toolchain by using a trace probe equipped with ETM trace, such as I-jet Trace (https://www.iar.com/iar-embedded-workbench/add-ons-and-integrations/in-circuit-debugging-probes/). PTM provides similar technology and possibilities as ETM. It is available in recent devices based on ARM Cortex-A cores. IAR Embedded Workbench is the world’s most widely used C/C++ compiler and debugger toolchain for developing applications for devices based on ARM processors. It incorporates a compiler, an assembler, a linker and a debugger into one completely integrated development environment. The toolchain is available in several editions, including a product package that is designed specifically for the ARM Cortex-M core family. Functionality for using ETMv4 and PTM is available from version 7.50. Learn more about IAR Embedded Workbench for ARM at www.iar.com/iar-embedded-workbench/arm/. Editor's Note: IAR Systems, IAR Embedded Workbench, IAR Connect, C-SPY, C-RUN, C-STAT, visualSTATE, IAR KickStart Kit, IAR Experiment!, I-jet, I-jet Trace, I-scope, IAR Academy, IAR, and the logotype of IAR Systems are trademarks or registered trademarks owned by IAR Systems AB. All other products names are trademarks of their respective owners. IAR Systems provides developers of embedded systems with world-leading software tools for developing competitive products based on 8-, 16-, and 32-bit processors. Established in Sweden in 1983, the company has over 46,000 customers globally, mainly in the areas of industrial automation, medical devices, consumer electronics, telecommunication, and automotive products. IAR Systems has an extensive network of partners and cooperates with the world’s leading semiconductor vendors. IAR Systems Group AB is listed on NASDAQ OMX Stockholm. For more information, please visit www.iar.com. This information was brought to you by Cision http://news.cision.com


News Article | November 10, 2015
Site: www.pcworld.com

If you believe what the tech industry tells us, everything is coming online. From pacemakers to washing machines to street lights, all will be networked together and feeding data into the cloud. If this Internet of Things comes to pass, we're going to need a lot more security than we have today. Chip design company ARM announced plans Tuesday for a new line of chips intended to help secure those devices. ARM is best known for designing the microprocessors in smartphones and tablets, but it also designs smaller chips, called microcontrollers, that feature heavily in IoT. Some four billion ARM microcontrollers were shipped by ARM licensees last year. Now, ARM is bringing a security technology long used in its smartphone processors down to these smaller chips. Called TrustZone, ARM says it will make it harder for hackers to break into IoT networks and meddle with things like industrial equipment, medical devices and networked cars. TrustZone is a hardware isolation technology that carves out a separate area on a chip where trusted code can run. The code that gets executed there is smaller than an OS such as Android, which runs elsewhere on the chip, so it can be carefully vetted for flaws and provides a smaller "attack surface" for hackers, according to ARM. TrustZone has been used in Samsung's Knox technology for securing phones, and by Netflix to prevent people from playing video on unapproved devices. TrustZone is in all of ARM's Cortex-A class processors, and at ARM's TechCon conference in Silicon Valley Tuesday, the company announced it will come to new versions of its smaller Cortex-M chips as well, in the form of the new ARMv8M architecture. ARM also announced a new interconnect specification, AMBA 5 AHB5, which lets the TrustZone area communicate securely with the rest of a chip package. It will take time for microcontrollers with TrustZone to get into the market. Once ARM delivers the design to licensees, they still need to manufacture and test it. "You'll probably see it in devices in 2017, though it could be before that," said Nandan Nayampally, vice president of marketing for ARM's CPU division. When it arrives, he says, it will provide an important level of added security for things like fitness trackers, smart meters in homes and connected industrial equipment. TrustZone doesn't secure devices by itself; it's used in conjunction with cryptography and random number generators. ARM also announced a part called CryptoCell, from its acquisition of Sansa Security this year, to speed the encryption of data on its chips. It will be used across all its Cortex families, from microcontrollers up to the most powerful SOCs aimed at servers. The announcements were made at ARM TechCon, where IoT will be a big focus, judging from the agenda. ARM will be competing in the IoT market with several other vendors including Intel, which perhaps not by chance just held its own IoT event a week before TechCon.


News Article | November 7, 2016
Site: www.reuters.com

TOKYO (Reuters) - SoftBank Group Corp plans to make future large-scale investments via an upcoming $100 billion tech fund it is establishing rather than on its own to avoid growing already bloated debt at the Japanese telecoms and technology company.

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