San Jose, CA, United States
San Jose, CA, United States

Aptina Imaging Corporation is a company that sells CMOS imaging products. Aptina's products can be found in mobile phones, digital, and video cameras, notebook computers, surveillance cameras, and medical, automotive and industrial applications, as well as videoconferencing, barcode scanners, toys and gaming products.CMOS sensors from Aptina are used in Nikon V1 , Nikon J1, Nikon V2.According to a marketing report, in 2009 year Aptina had a 16% share of the CMOS image sensors market, with revenue estimated at $671 million. Wikipedia.


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Patent
Aptina | Date: 2017-05-24

Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels, analog control circuitry and storage and processing circuitry. The array of image pixels, the analog control circuitry, and the storage and processing circuitry may be formed on separate, stacked semiconductor substrates or may be formed in a vertical stack on a common semiconductor substrate. The image pixel array may be coupled to the control circuitry using vertical metal interconnects. The control circuitry may route pixel control signals and readout image data signals over the vertical metal interconnects. The control circuitry may provide digital image data to the storage and processing circuitry over additional vertical conductive interconnects coupled between the control circuitry and the storage and processing circuitry. The storage and processing circuitry may be configured to store and/or process the digital image data.


Patent
Aptina | Date: 2014-02-03

The present invention relates to a pumped pixel that includes a first photo-diode accumulating charge in response to impinging photons, a second photo-diode, and a floating diffusion positioned on a substrate. The pixel also includes a charge barrier positioned on the substrate between the first photo-diode and the second photo-diode, where the charge harrier temporarily blocks charge transfer between the first photo-diode and the second photo-diode. A pump gate may also be formed on the substrate adjacent to the charge barrier. The pump gate pumps the accumulated charge from the first photo-diode to the second photo-diode through the charge barrier. Also included is a transfer gate positioned on the substrate between the second photo-diode and the floating diffusion. The transfer gate serves to transfer the pumped charge from, the second photo-diode to the floating diffusion.


An image sensor operable in global shutter mode ma include small pixels with high charge storage capacity, low dark current, and no image lag. Storage capacity of a photodiode and a charge storage diode may be increased by placing a p+ type doped layer under the photodiode and the charge storage diode. The p+ type doped layer ma include an opening for allowing photo-generated charge carriers to flow from the silicon bulk to the charge storage well located near the surface of the photodiode. A compensating n type doped implant may be formed in the opening. Image lag is prevented by placing a p type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. The p+ type doped layer may extend under the entire pixel array.


Patent
Aptina | Date: 2014-08-20

An image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a semiconductor substrate. Buried light shielding structures may be formed on the substrate to prevent pixel circuitry that is formed in the substrate between two adjacent photodiodes from being exposed to incoming light. The buried light shields may be formed over conductive gate structures. A metal silicide layer may be formed to completely cover these conductive gate structures. Antireflective coating material may optionally be formed over the metal silicide layer. Forming gate structures with a metal silicide liner can help reduce optical pixel crosstalk and enhance global shutter efficiency.


Patent
Aptina | Date: 2016-08-10

An image sensor may have an array of image sensor pixels arranged in color filter unit cells each having one red image pixel that generates red image signals, one blue image pixel that generate blue image signals, and two clear image sensor pixels that generate white image signals. The image sensor may be coupled to processing circuitry that performs filtering operations on the red, blue, and white image signals to increase noise correlations in the image signals that reduce noise amplification when applying a color correction matrix to the image signals. The processing circuitry may extract a green image signal from the white image signal. The processing circuitry may compute a scaling value that includes a linear combination of the red, blue, white and green image signals. The scaling value may be applied to the red, blue, and green image signals to produce corrected image signals having improved image quality.


An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high charge storage capacity is achieved by placing a p+ type doped layer under the pixel charge storage region with an opening in it for allowing photo-generated charge carriers to flow from the silicon hulk to the charge storage well located near the surface of the photodiode. A compensating n-type doped implant may be formed in the opening. Image lag is prevented by placing a p type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. Blooming control is achieved by adjusting the length of the transfer gate in the pixel and thereby adjusting the punch-through potential under the gate.


Patent
Aptina | Date: 2014-03-21

An electronic device may be provided with imaging modules or communications modules. Imaging modules and communications modules may be improved with the use of plasmonic light collectors. Plasmonic light collectors exploit the interaction between incoming light and plasmons in the plasmonic light collector to redirect the path of the incoming light. Plasmonic light collectors may be used to form lenses for image pixels in an imaging module or to form light pipes or lenses for use in injecting optical communications into a fiber optic cable. Plasmonic lenses may be formed by lithography of metallic surfaces by implantation or by stacking and patterning of layers of materials having different dielectric properties. Plasmonic image pixels may be smaller and more efficient than conventional image pixels. Plasmonic light guides may have significantly less signal loss than conventional lenses and light guides.


Electronic devices may include image sensors that capture interleaved images having rows of long-exposure pixel values interleaved with rows of short-exposure pixel values. Processing circuitry in the electronic device may (spatially) partition the interleaved images into multiple bins. The processing circuitry may generate a weighted long-exposure pixel value for each bin and a weighted short-exposure pixel value for each bin. The weighted long and short exposure values in each bin may be combined to generate a binned high-dynamic-range (HDR) pixel value for that bin. The processing circuitry may output a binned HDR image formed from the binned HDR pixel values to additional circuitry such as video processing circuitry for performing additional image processing operations. If desired, the image sensor and processing circuitry may be combined into an integrated structure that generates a single binned HDR pixel value and multiple integrated structures may be used.


Patent
Aptina | Date: 2014-08-22

An image sensor die may include a pixel array formed in an image sensor substrate and covered by a transparent cover layer. The transparent cover layer may be attached to the image sensor substrate using adhesive. Electrical interconnect structures such as conductive vias may be formed in the transparent cover layer and may be used in conveying electrical signals between the image sensor and a printed circuit board. The conductive vias may have one end coupled to a bond pad on the upper surface of the transparent cover layer and an opposing end coupled to a bond pad on the upper surface of the image sensor substrate. The conductive vias may pass through openings that extend through the transparent cover layer and the adhesive. Conductive structures such as wire bonds, stud bumps, or solder balls may be coupled to the bond pads on the surface of the transparent cover layer.


Patent
Aptina | Date: 2014-05-27

An imager may include depth sensing pixels that provide an asymmetrical angular response to incident light. The depth sensing pixels may each include a substrate region formed from a photosensitive portion and a non-photosensitive portion. The depth sensing pixels may include mechanisms that prevent regions of the substrate from receiving incident light. Depth sensing pixel pairs may be formed from depth sensing pixels that have different asymmetrical angular responses. Each of the depth sensing pixel pairs may effectively divide the corresponding imaging lens into separate portions. Depth information for each depth sensing pixel pair may be determined based on the difference between output signals of the depth sensing pixels of that depth sensing pixel pair. The imager may be formed from various combinations of depth sensing pixel pairs and color sensing pixel pairs arranged in a Bayer pattern or other desired patterns.

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