Torrance, CA, United States
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Patent
Aneeve LLC | Date: 2014-01-27

A transparent thin film transistor is fabricated on a substrate by first depositing a concentrated aqueous metallic carbon nanotube solution using an inkjet printer on the substrate to form source and drain electrodes with a channel therebetween. The deposited metallic carbon nanotubes are then cleaned in mild acid; and the source and drain electrodes are cured by heating. An aqueous semiconducting carbon nanotube solution is then deposited in the channel on the substrate using an inkjet printer on the substrate to form a channel semiconductor. The channel semiconductor is then cleaned using a mild acid. A dielectric gate of ionic gel dielectric is then deposited on the cleaned channel semiconductor using an inkjet printer; and the ionic gel dielectric is cured by heating.


Grant
Agency: Department of Defense | Branch: Army | Program: STTR | Phase: Phase I | Award Amount: 99.98K | Year: 2011

We aim to undertake a Phase I study of multiferroic heterostructure thin film composite materials (CoFeB / PMN-PT) and their applications in high frequency (>10GHz) microwave passive circuit building blocks. In this Phase I investigation, Aneeve Nanotechnologies together with Prof Charles Ahn (Yale University) and Dr. Pedram Khalili (UCLA) will develop multiferroic heterostructure systems to demonstrate magneto-electrically tunable RF isolators. The project will consist of material sputter deposition (CoFeB/PMN-PT), material characterization (MOKE, SQUID, SEM, AFM), device design / fabrication (metallization, etching) and device RF testing (GHz range). Within Phase 1 we envisage to fabricate 2 batches of 20 devices focusing on key figures of merit.


Grant
Agency: Department of Defense | Branch: Defense Threat Reduction Agency | Program: SBIR | Phase: Phase I | Award Amount: 149.97K | Year: 2014

ABSTRACT: Metal-oxide devices offer power dissipation advantages such as low standby power dissipation, better defect resilience versus silicon, superior electronic and magnetic properties, and are broadly Si compatible hence their attractiveness and candidacy fo BENEFITS: Radiation hardened microelectronics are critical for future Department of Defense (DoD) systems where devices are required to function in high radiation environments. Environments with high levels of ionizing radiation can cause both single event effects


Grant
Agency: Department of Defense | Branch: Air Force | Program: SBIR | Phase: Phase I | Award Amount: 99.06K | Year: 2011

We will undertake a Phase I study of CNT FET radio frequency devices for Low-Noise Amplifiers (LNA), Power Amplifiers (PA) and RF switches towards enhancing the reliability and efficiency of Unmanned Aircraft Systems (UAS). Existing UAS electronic systems are bulky and inefficient (electrons operate in the diffusive transport regime). It is well defined that the key limiting factor of CNT RF transistor technology is the presence of metallic CNT that occurs during the CNT growth process. These metallic CNT components are responsible for unacceptable Ioff currents that cripple Ion/Ioff ratios and suffocates the electrostatic field effect on the semiconducting channel resulting in low transconductance (gm). Our approach to this SBIR Phase I is to increase device efficiency beyond III-V devices by evoking the CNT ballistic transport regime. In order to realize this goal we plan to (a) reduce metallic tubes by optimizing CNT aligned grow processes (b) increase CNT density for higher current capacity (uA/um) and (c) further optimize CNT FET device design and fabricate a LNA aiming to demonstrate positive gain. BENEFIT: The US Armed forces are embracing unmanned aerial systems (UAS) as critical tools for intelligence, surveillance and reconnaissance and in some cases, also for strike missions in particular in counter-insurgency operations. Based on Visiongain"s research (www.visiongain.com), global spending in 2009 on unmanned aerial vehicles (UAV) reached $5.1bn. Over the forecast period of 2010-2020, the cumulative UAV market will total nearly $71bn. Within these systems a great dependence lies with advances in electronics, in particular where one could decrease weight, increase battery lifetime and reduce power consumption. This is where advances in low power, light and robust circuits developed within this project can make a dramatic impact to the performance of these UAS systems. In addition, advances from this proposal have the potential to revolutionize the $60 billion analog and mixed signal semiconductor markets. As an example of potential market size, Analog electronics (making use of CNT superior RF properties) sales were over $47 billion in 2009 (11.1 percent CAGR).


Grant
Agency: National Science Foundation | Branch: | Program: SBIR | Phase: Phase I | Award Amount: 142.95K | Year: 2012

This Small Business Innovation Research Phase I project aims to undertake a feasibility study of printing ultra-pure semiconducting and metallic single-walled carbon nanotube (SWCNT) inks as channel materials and electrodes of thin-film-transistors, and to fabricate all-SWCNT circuits such as inverters (<5 V) and ring oscillators (>1 kHz) in two-dimensional (2-D) and three-dimensional (3-D) architectures. The current trend of increasing electronic function per area, offering optical transparency, flexibility and lower cost, is driving products to be produced using printed electronics. This project will leverage existing inkjet printing technologies to implement all-SWCNT thin-film transistors and integrated circuits. To increase areal functional density and overcome interconnect parasitics, this project will aim to develop all-SWCNT printed devices in a 3-D architecture interconnected with metallic SWCNTs that will enable complete circuit transparency of the printed electronics for optoelectronic and display applications. Areal functional density will be increased, and functionalities such as signal delay and power consumption will be improved as a result. Printed integrated circuits based on transistors constructed and interconnected using single-walled carbon nanotubes (SWCNTs) are highly desirable for low cost, vacuum-less, scalable, and flexible applications such as backplane displays, radio frequency identification tags, electronic paper and disposable electronics. The broader impact/commercial potential of this project is all-SWCNT thin-film transistors (TFTs) and circuits of fully-transparent, flexible, dense materials. Creation of these devices will enable products in backplane displays and solar equipment, non-volatile memories, disposable electronics, and semiconductor manufacturing and will impact a plethora of low-cost consumer electronics products. Using metal electrodes compromises a circuit's transparency, flexibility, and mechanical strength. Our all-SWNCT devices will overcome these limitations, as no solid, opaque materials will be employed. This project has the potential to greatly augment the printed electronic industry that is expected to grow to $24 billion in 2015, with an astonishing current growth rate of over 30% per year.


Grant
Agency: Department of Defense | Branch: Air Force | Program: SBIR | Phase: Phase I | Award Amount: 149.92K | Year: 2012

ABSTRACT: We aim to undertake a Phase I study on radiation hardened graphene memory devices for military and space applications. This project will focus on developing a nonvolatile single-layer graphene ferroelectric field-effect transistor (FET) memory device. This device incorporates non-volatility arising from a ferroelectric film component (generating hysteresis & non-volatility from correlated effects), coupled with graphene"s superior electron transport FET properties to provide transducer electrical read-out functionality. The outcome of Phase I will be an optimized graphene ferroelectric FET device design to be fabricated in Phase II. BENEFIT: Graphene-based nanoelectronics have emerged over the past several years, mostly funded in the promise of going beyond CMOS as contenders for logic and memory functionality. Graphene offers power dissipation advantages as well as fundamental material advantages over silicon, hence its attractiveness and candidacy for use in military and space applications. Its super high mobility and thermal conductivity are the highest of all materials. However, before graphene-based logic is viable for space and military applications, device design concepts must be developed and proven that are both robust and can leverage graphene"s feature size advantages into a much higher density device. Obstacles include devising a reliable and producible device design, selecting substrate materials, and achieving superior profound advantages such as radiation hardness.


Grant
Agency: NSF | Branch: Standard Grant | Program: | Phase: | Award Amount: 142.95K | Year: 2012

This Small Business Innovation Research Phase I project aims to undertake a feasibility study of printing ultra-pure semiconducting and metallic single-walled carbon nanotube (SWCNT) inks as channel materials and electrodes of thin-film-transistors, and to fabricate all-SWCNT circuits such as inverters (< 5 V) and ring oscillators (> 1 kHz) in two-dimensional (2-D) and three-dimensional (3-D) architectures. The current trend of increasing electronic function per area, offering optical transparency, flexibility and lower cost, is driving products to be produced using printed electronics. This project will leverage existing inkjet printing technologies to implement all-SWCNT thin-film transistors and integrated circuits. To increase areal functional density and overcome interconnect parasitics, this project will aim to develop all-SWCNT printed devices in a 3-D architecture interconnected with metallic SWCNTs that will enable complete circuit transparency of the printed electronics for optoelectronic and display applications. Areal functional density will be increased, and functionalities such as signal delay and power consumption will be improved as a result. Printed integrated circuits based on transistors constructed and interconnected using single-walled carbon nanotubes (SWCNTs) are highly desirable for low cost, vacuum-less, scalable, and flexible applications such as backplane displays, radio frequency identification tags, electronic paper and disposable electronics.

The broader impact/commercial potential of this project is all-SWCNT thin-film transistors (TFTs) and circuits of fully-transparent, flexible, dense materials. Creation of these devices will enable products in backplane displays and solar equipment, non-volatile memories, disposable electronics, and semiconductor manufacturing and will impact a plethora of low-cost consumer electronics products. Using metal electrodes compromises a circuits transparency, flexibility, and mechanical strength. Our all-SWNCT devices will overcome these limitations, as no solid, opaque materials will be employed. This project has the potential to greatly augment the printed electronic industry that is expected to grow to $24 billion in 2015, with an astonishing current growth rate of over 30% per year.


Grant
Agency: Department of Defense | Branch: Air Force | Program: SBIR | Phase: Phase II | Award Amount: 769.86K | Year: 2012

ABSTRACT: Our Phase II project on"Carbon Nanotube (CNT) Based Electronic Components for Unmanned Aircraft Systems (UAS)"will aim to model, design, fabricate, optimize and characterize RF CNT devices and circuits that are critical for RF transceiver applications in radar, communications and a variety of military systems within Unmanned Aircraft Systems. The goal of Phase II will be to develop our CNT RF FET T-gate device into a manufacturable prototype with improved capabilities beyond the state of the art with respect to linearity and power dissipation. Within Phase I our team fabricated T-gate based RF devices/circuits achieving device cut-off frequencies of 20GHz with unity power gain of 10GHz which is the highest reported extrinsic performance of CNT RF device report in the public domain. In Phase II, we will improve our large signal device model to include linearity and noise components. This will allow optimization of CNT FET design, leading to CNT FET RF circuit design and implementations. Our fabrication approach consists of fabricating supporting/peripheral CMOS passives and integrating our"in-house"CNT as a post-CMOS process. Our characterization will obtain linearity results such as IIP3, OIP3, as well as noise performance. BENEFIT: A key driver of this project aims at improving unmanned aircraft electronics systems. Given the use of high powered RF systems that includes various data links, command and control communications, RF sensors, radar and line of sight and beyond line of sight sensors and communications, much improvement in increased battery life and increased flight time can be obtained by use of CNT RF FET devices. Furthermore, such motivational factors are relevant for all military mobile communication and"electronic heavy"equipment units such as the soldier (lighter communication handheld devices) and naval equipment (lighter & more mobile). Advances from this proposal have the potential to revolutionize the $60 billion analog and mixed signal semiconductor markets. In particular, this technology will directly impact critical RF front end components used in state-of-the-art transceiver architectures. Superior low power and highly linear device will impact the following market segments: Low-Noise Amplifiers (LNAs) RF amplifiers primarily used in communication systems to amplify weak signals captured by an antenna. Broadband Amplifiers RF amplifiers with a flat response over a wide range of frequencies. RF Power Amplifiers RF amplifiers that convert a low-power radio frequency signal into a larger signal for driving the antenna of a transmitter. RF & Microwave Amplifiers Used for high-power amplification at low microwave frequencies. Other opportunities include mixer circuits and VCOs.


Grant
Agency: Department of Defense | Branch: Defense Advanced Research Projects Agency | Program: SBIR | Phase: Phase II | Award Amount: 749.78K | Year: 2010

Our Phase II SBIR project will aim to develop a manufacturing path for a printed integrated circuit (PICs) platform based on thin film transistors (TFT) constructed using carbon nanotube (CNT) fabrics. The Phase II project will continue this development towards a complete TFT CNT printing platform via the demonstration of TFT devices and circuits such as a CNT complementary transistor pair (n- and p-type), inverter circuits, ring oscillator circuits and RF (radio frequency) transistors. These developments will lead towards the pathway in prototyping ink-jet printed biosensors for hormone detection. Essential technical challenges that will be addressed within Phase II include scaling the purification of semiconducting CNT inks for manufacturing, development of stable n-type doping methods, the development of a TFT gate stack and the optimization of TFT device and circuit printing. Our ultimate goal is to develop a simple and low-cost CNT ink-jet printing platform where one can simply print devices, sensors or circuits with a push of a button.


A process for the cleaning of carbon nanostructure and similar materials and structures for removal of surfactant chemicals. The process includes washing the carbon nanostructures with concentrated acetic acid which may be glacial acetic acid. The cleaning process is also considered in carbon nanostructure film preparation with deposition of carbon nanostructures in solution with surfactant chemicals before the washing. Possible surfactants include sodium cholate (SC) and sodium dodecyl sulfate (SDS). Carbon nanostructure deposition on a substrate may be by various printing methods.

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