Mercier P.P.,Massachusetts Institute of Technology |
Bhardwaj M.,Innovators In Health |
Daly D.C.,Analog Technologies |
Chandrakasan A.P.,Massachusetts Institute of Technology
IEEE Journal of Solid-State Circuits | Year: 2010
This paper describes a digital baseband designed for use in a non-coherent IR-UWB system. Owing to the nonlinear statistics introduced by the energy-sampling RF front-end, the baseband employs a new quadratic correlation technique that achieves comparable performance to a matched filter classifier, with the added benefit of being robust to SNR estimation errors. Additionally, alias-free codes are introduced that allow for pulse-level synchronization accuracy without requiring any increase in front-end complexity. Fabricated in a 90 nm CMOS process, the digital baseband utilizes significant parallelism in addition to clock and data gating to achieve low-power operation, with supply voltages as low as 0.55 V. At a clock frequency of 32 MHz, the baseband requires 14-to-79 μs to process a preamble during which it consumes an average power of 1.6 mW, while payload demodulation requires 12 pJ/bit. © 2006 IEEE.
Aguilar Angulo J.A.,French National Center for Scientific Research |
Kussener E.,French National Center for Scientific Research |
Barthelemy H.,French National Center for Scientific Research |
Duval B.,Analog Technologies
2014 IEEE Faible Tension Faible Consommation, FTFC 2014 | Year: 2014
This paper presents a low power True Random Number Generator (TRNG), based on the discrete time-chaos, intended for a RFID security applications, to be developped on CMOS 350nm standard technology. The circuit relies on a discrete time chaotic oscillator to generate patterns to be sampled to get a raw random signal to be debiased by a digital corrector. © 2014 IEEE.
Shimonomura K.,Ritsumeikan University |
Kameda S.,Osaka University |
Iwata A.,Analog Technologies |
Yagi T.,Osaka University
IEEE Transactions on Neural Networks | Year: 2011
A silicon retina is an intelligent vision sensor that can execute real-time image preprocessing by using a parallel analog circuit that mimics the structure of the neuronal circuits in the vertebrate retina. For enhancing the sensor's robustness to changes in illumination in a practical environment, we have designed and fabricated a silicon retina on the basis of a computational model of brightness constancy. The chip has a wide-dynamic-range and shows a constant response against changes in the illumination intensity. The photosensor in the present chip approximates logarithmic illumination-to-voltage transfer characteristics as a result of the application of a time-modulated reset voltage technique. Two types of image processing, namely, Laplacian-Gaussian-like spatial filtering and computing the frame difference, are carried out by using resistive networks and sample/hold circuits in the chip. As a result of these processings, the chip exhibits brightness constancy over a wide range of illumination. The chip is fabricated by using the 0.25-μm complementary metal-oxide semiconductor image sensor technology. The number of pixels is 64 × 64, and the power consumption is 32 mW at the frame rate of 30 fps. We show that our chip not only has a wide-dynamic-range but also shows a constant response to the changes in illumination. © 2006 IEEE.
Thoppay P.E.,Analog Technologies |
Dehollain C.,Ecole Polytechnique Federale de Lausanne |
Green M.M.,University of California at Irvine |
Declercq M.J.,Ecole Polytechnique Federale de Lausanne
IEEE Journal of Solid-State Circuits | Year: 2011
This paper describes a receiver system design for impulse-radio ultra-wideband (IR-UWB) that operates at two carrier frequencies-3.494 and 3.993 GHzwith a 10-Mbps data rate. To reduce the power consumption of the front-end amplifiers, a super-regenerative architecture is used. An integrated circuit, implemented in a CMOS 0.18-μm technology and operating with a 1.5-V power supply, exhibits energy consumption of 0.24 nJ/bit with a measured sensitivity of -66 and -61dBm at 3.494 and 3.993 GHz, respectively, with a BER of 10 -3. Also included on the integrated circuit is an automatic tuning circuit based on a digital phase-locked loop that is used to set the resonant frequency of the super-regenerative block. © 2011 IEEE.
Analog Technologies | Date: 2011-08-26
A phase-locked loop circuitry includes an oscillator circuitry having an input and an output. A phase detector circuit is connected to the output of the oscillator circuitry and has outputs thereof. A digital loop filter circuit is connected to the outputs of the phase detector circuitry and has outputs thereof. The outputs of the digital loop filter circuit are coupled, through a summing circuit, to the input of the oscillator circuitry. Values associated with the outputs of the digital loop filter circuit are updated concurrently based upon values associated with the outputs of the phase detector circuitry. One output of the digital loop filter circuitry has a high-pass transfer function.
Analog Technologies | Date: 2010-10-21
A comparator based circuit with effective offset cancellation includes first and second amplifiers and an offset capacitor operatively connected to the first and second amplifiers. An offset voltage source generates an offset voltage. A first switch connects the offset voltage source to ground during a first time period. The first amplifier generates an output voltage in response to the first switch connecting the offset voltage source to ground during the first time period. A second switch connects the offset capacitor to ground during a second time period. The first switch disconnects the offset voltage source from ground during a third time period, and the second switch disconnects the offset capacitor from ground during the third time period.
Analog Technologies | Date: 2011-01-03
A switched capacitor circuit includes a threshold detector to generate a threshold detection signal when a difference between first and second input signals crosses a predetermined level. A variable current source produces a varying amount of current in response to the difference between the input signals. A voltage measurement means produce a measurement signal in response to the difference between the input signals. A correction means produces a correction signal in response to the measurement signal to produce an optimum coarse phase overshoot. A timing comparison means produces a timing signal in response to the difference between the input signals. A correction means produces a correction signal in response to the timing signal to produce an optimum coarse phase overshoot.
Analog Technologies | Date: 2011-05-20
A switched capacitor circuit includes a threshold detector to generate a threshold detection signal when a difference between first and second input signals crosses a predetermined level. A coarse current source produces a coarse ramp. A series sampling capacitor samples a coarse output voltage when the threshold detector indicates a first threshold crossing. The sampling capacitor is connected in series with a fine current source producing a fine ramp.
Agency: National Science Foundation | Branch: | Program: SBIR | Phase: Phase I | Award Amount: 99.75K | Year: 2009
This SBIR Phase I research proposal will investigate new circuit architectures for high performance Analog-to-Digital (A/D) converters with potentially more than an order of magnitude lower power consumption and much smaller silicon area than conventional architectures. The new architectures are based on zero-crossing detectors. The zero-crossing based circuits utilize the virtual-ground based signal processing as in traditional op-amp based circuits. Therefore, they provide the same functionality and robustness and are compatible with most op-amp based circuit architectures. The zero-crossing detectors replace the virtual ground forcing function of the op-amp with virtual ground detection by a zero-crossing detector. The zero-crossing detector based circuits provide high speed operation at extremely low power consumption, are tiny in size, and are compatible with standard deep submicron Complementary Metal Oxide Semiconductors (CMOS) technologies. The proposed research, if successful, can have far reaching impact, because A/D converters are ubiquitous in electronics systems. The power consumption represents approximately thirty (30) fold reduction from the state-of-the art. It will provide high performance A/D converters built in deep submicron CMOS technologies thereby exploiting their very low cost, high-speed capability, tiny size, high level of integration, and low power digital circuits. These may include software-defined and cognitive radios, and portable phased array radios among many other possibilities. For military applications, Portable phased-array radars, battery-operated smart sensors (e.g. smart dust), micro-robots, and small unmanned aircrafts can benefit from the low power and tiny size/weight/volume of the proposed circuits.