Time filter

Source Type

Satsumasendai, Japan

Niitsu K.,Gunma University | Sakurai M.,Konica Minolta | Harigai N.,Gunma University | Yamaguchi T.J.,Gunma University | And 2 more authors.
IEEE Journal of Solid-State Circuits

This paper describes a reference-clock-free, high- time-resolution on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier (TDA) with duty-cycle compensation. A self-referenced clock with multiples of the clock period removes the necessity for a reference clock. In addition, a cascaded TDA with duty-cycle compensation improves the time resolution while maintaining the operational speed. Test chips were designed and fabricated using 65 nm and 40 nm CMOS technologies. The areas occupied by the circuits are 1350 μm2 (with TDA, 65 nm), 490 μm2 (without TDA, 65 nm), 470 μm2 (with TDA, 40 nm), and 112 μm2 (without TDA, 40 nm). Time resolutions of 31 fs (with TDA) and 2.8 ps (without TDA) were achieved. The proposed new architecture provides all-digital timing jitter measurement with fine-time-resolution measurement capability, without requiring a reference clock. © 2012 IEEE. Source

Niitsu K.,Nagoya University | Harigai N.,Gunma University | Yamaguchi T.J.,Advantest Laboratories Ltd. | Kobayashi H.,Gunma University
IEICE Electronics Express

This study demonstrates the design and testing of a reconfigurable cascaded time amplifier (TA) that enables a reduction in the output offset. By testing the polarity of the output offset time caused by process variations in each stage and then reconfiguring the inter-stage connections, we find that the total output offset time can be reduced dramatically. The results of a SPICE simulation of a 65-nm CMOS match well with the theoretical estimates and show the effectiveness of this proposed testing structure and reconfigurable inter-stage connection technique. © IEICE 2014. Source

Masuda S.,Advantest Laboratories Ltd. | Seki A.,Advantest Laboratories Ltd. | Masuda Y.,Hachinohe Institute of Technology
Applied Physics Letters

We describe here how we have improved the crystal qualities and controlled the crystal phase of the lanthanum-modified lead zirconate titanate (PLZT) film without changing the composition ratio using an oxygen-pressure crystallization process. A PLZT film deposited on a SrTiO3 substrate with the largest electro-optic (EO) coefficient of 498 pm/V has been achieved by controlling the crystal phase of the film. Additionally, a fatigue-free lead zirconate titanate (PZT) capacitor with platinum electrodes has been realized by reducing the oxygen vacancies in the films. © 2010 American Institute of Physics. Source

Masuda S.,Advantest Laboratories Ltd. | Seki A.,Advantest Laboratories Ltd. | Shiota K.,Advantest Laboratories Ltd. | Hara H.,Advantest Laboratories Ltd. | Masuda Y.,Hachinohe Institute of Technology
Journal of Applied Physics

We investigate the electro-optic properties and high-frequency relative dielectric constants of epitaxially grown lanthanum-modified lead zirconate titanate (PLZT) and polycrystalline barium titanate (BaTiO3) films in a high-frequency range of up to 40 GHz for designing a high-speed ferroelectric thin-film modulator. We also demonstrate a ferroelectric thin-film Mach-Zehnder-type waveguide modulator using the epitaxially grown PLZT film. The use of a composite structure with a low dielectric coefficient substrate and a buffer layer enabled of a ferroelectric thin-film waveguide modulator with 40-Gb/s operation. © 2011 American Institute of Physics. Source

Sato T.,Advantest Laboratories Ltd. | Okayasu J.,Advantest Laboratories Ltd. | Takikawa M.,Advantest Laboratories Ltd. | Suzuki T.-K.,Japan Advanced Institute of Science and Technology
IEEE Electron Device Letters

We investigated AlGaN-GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with high-permittivity (high-k) oxynitride TaOxNy gate dielectric (k ∼24) obtained by sputtering deposition. The MIS-HEMTs show excellent pulsed current-voltage characteristics, small off-leakage currents (10-10A/mm), high on/off current ratios (>10-10), and favorable threshold voltage stabilities. From comparisons with MIS-HEMTs with TaOx gate dielectric, we conclude that N incorporation in gate dielectric can suppress current collapse and deep-level states. © 1980-2012 IEEE. Source

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